Network Search Engines (NSEs), including content addressable memory (CAM) devices, are often used in packet-switched networking applications to manage network traffic. An NSE can be instructed to compare a search value, typically formed from one or more fields within a packet header, with a database of values stored within an associative storage array or CAM array. If the search value matches a database entry, the NSE device generates a match address that identifies the location of the matching entry within the CAM array, and asserts a match flag to signal the match. The match address is then typically used to index another storage array, either within or separate from the NSE, to retrieve information that indicates additional operations to be performed with respect to the packet.
In many applications, it may be desirable to store multiple databases within an NSE and to selectively search the databases according to instructions from a control device such as a network processing unit (NPU) or the like. Accordingly, modern NSEs often include multiple, distinct CAM blocks (e.g., each CAM block having a respective CAM array and circuitry to generate a block match address and block flag signal based on match results generated within the corresponding CAM array) that may be allocated to storage of different databases. Unfortunately, allocating NSE storage on a CAM block by CAM block basis often results in substantial wasted storage as some databases require only a fractional portion of the CAM array entries within a CAM block (e.g., as when the database is small, or when the database required one or more whole CAM blocks and only a fractional portion of another). While table identifier bits or tag bits may be stored within the CAM array entries to designate specific entries as belonging to a particular database, storage of such bits undesirably reduces storage capacity.